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dc.contributor.authorLee, Ming Lingen_US
dc.contributor.authorChen, Hsiangen_US
dc.contributor.authorKao, Chyuan Hauren_US
dc.contributor.authorMahanty, Rama Krushnaen_US
dc.contributor.authorSung, Wei Kungen_US
dc.contributor.authorLin, Chun Fuen_US
dc.contributor.authorLin, Chan Yuen_US
dc.contributor.authorChang, Kow Mingen_US
dc.date.accessioned2018-08-21T05:54:02Z-
dc.date.available2018-08-21T05:54:02Z-
dc.date.issued2017-06-01en_US
dc.identifier.issn0042-207Xen_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.vacuum.2017.02.009en_US
dc.identifier.urihttp://hdl.handle.net/11536/145511-
dc.description.abstractIn this study, we proposed a metal-oxide high-k-oxide-silicon (MOHOS) memory device using a nickel oxide film as the charge trapping layer, and studied the effect of post-deposition rapid thermal annealing (RTA) on the physical and electrical properties. The physical properties were investigated via multiple material analysis techniques such as X-ray diffraction and atomic force microscopy. The optimal annealing temperature for depositing the charge trapping layer was determined through a thorough investigation of the memory window, program/erase (P/E) cycle, crystalline structure, and material composition. Compared to the as-deposited NiO2 film, a MOHOS-type memory device annealed at 900 degrees C in a nitrogen atmosphere exhibited improved memory characteristics, in terms of a larger window in the capacitance-voltage hysteresis, better data retention (lower charge loss of 11%), faster program and erase cycles, and endurance characteristics (104 P/E cycles) without any significant drift in the flat band voltage. Therefore, the MOHOS memory device with a NiO2 trapping layer is a very promising candidate for future memory device applications. (C) 2017 Elsevier Ltd. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectMOHOSen_US
dc.subjectCharge trappingen_US
dc.subjectRTAen_US
dc.subjectNiO2en_US
dc.titlePhysical and electrical properties of flash memory devices with nickel oxide(NiO2) charge trapping layeren_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.vacuum.2017.02.009en_US
dc.identifier.journalVACUUMen_US
dc.citation.volume140en_US
dc.citation.spage47en_US
dc.citation.epage52en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000401382300010en_US
Appears in Collections:Articles