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dc.contributor.authorTsou, Wen-Jieen_US
dc.contributor.authorYang, Wen-Hauen_US
dc.contributor.authorLin, Jian-Heen_US
dc.contributor.authorChen, Hsinen_US
dc.contributor.authorChen, Ke-Horngen_US
dc.contributor.authorWey, Chin-Longen_US
dc.contributor.authorLin, Ying-Hsien_US
dc.contributor.authorLin, Shian-Ruen_US
dc.contributor.authorTsai, Tsung-Yenen_US
dc.date.accessioned2018-08-21T05:56:47Z-
dc.date.available2018-08-21T05:56:47Z-
dc.date.issued2017-01-01en_US
dc.identifier.issn0193-6530en_US
dc.identifier.urihttp://hdl.handle.net/11536/146637-
dc.language.isoen_USen_US
dc.titleDigital Low-Dropout Regulator with Anti PVT-Variation Technique for Dynamic Voltage Scaling and Adaptive Voltage Scaling Multicore Processoren_US
dc.typeProceedings Paperen_US
dc.identifier.journal2017 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)en_US
dc.citation.spage338en_US
dc.citation.epage338en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000403393800140en_US
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