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dc.contributor.authorLee, Jen-Weien_US
dc.contributor.authorChung, Szu-Chien_US
dc.contributor.authorChang, Hsie-Chiaen_US
dc.contributor.authorLee, Chen-Yien_US
dc.date.accessioned2018-08-21T05:56:50Z-
dc.date.available2018-08-21T05:56:50Z-
dc.date.issued2012-01-01en_US
dc.identifier.issn0302-9743en_US
dc.identifier.urihttp://hdl.handle.net/11536/146712-
dc.description.abstractCorrelation power-analysis (CPA) attacks are a serious threat for cryptographic device because the key can be disclosed from data-dependent power consumption. Hiding power consumption of encryption circuit can increase the security against CPA attacks, but it results in a large overhead for cost, speed, and energy dissipation. Masking processed data such as randomized scalar or primary base point on elliptic curve is another approach to prevent CPA attacks. However, these methods requiring pre-computed data are not suitable for hardware implementation of real-time applications. In this paper, a new CPA countermeasure performing all field operations in a randomized Montgomery domain is proposed to eliminate the correlation between target and reference power traces. After implemented in 90-nm CMOS process, our protected 521-bit dual-field elliptic curve cryptographic (DF-ECC) processor can perform one elliptic curve scalar multiplication (ECSM) in 4.57ms over GF(p(521)) and 2.77ms over GF(2(409)) with 3.6% area and 3.8% power overhead. Experiments from an FPGA evaluation board demonstrate that the private key of unprotected device will be revealed within 10(3) power traces, whereas the same attacks on our proposal cannot successfully extract the key value even after 10(6) measurements.en_US
dc.language.isoen_USen_US
dc.subjectElliptic curve cryptography (ECC)en_US
dc.subjectside-channel attacksen_US
dc.subjectpower-analysis attacksen_US
dc.subjectMontgomery algorithmen_US
dc.titleAn Efficient Countermeasure against Correlation Power-Analysis Attacks with Randomized Montgomery Operations for DF-ECC Processoren_US
dc.typeProceedings Paperen_US
dc.identifier.journalCRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS - CHES 2012en_US
dc.citation.volume7428en_US
dc.citation.spage548en_US
dc.citation.epage564en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000406184300032en_US
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