Wideband Time-Delay Circuit

Abstract

Limitations of the delay bandwidth in active delay circuits can be significantly improved in high-order transfer functions. In this paper, a flat wideband delay circuit is presented using the 2nd-order form of the Pade approximant. The delay circuit is designed and implemented in 0.18 mu m CMOS technology. The measured results show that the circuit achieves a delay time of 49 psec in the GHz frequency range. The power consumption of the core circuit is 7.88 mW from 1.8 V supply voltage. The entire die occupies an area of 520x820 mu m(2)