完整後設資料紀錄
DC 欄位語言
dc.contributor.authorLee, Yu-Hueien_US
dc.contributor.authorHuang, Tzu-Chien_US
dc.contributor.authorYang, Yao-Yien_US
dc.contributor.authorChou, Wen-Shenen_US
dc.contributor.authorChen, Ke-Horngen_US
dc.contributor.authorHuang, Chen-Chihen_US
dc.contributor.authorLin, Ying-Hsien_US
dc.date.accessioned2014-12-08T15:20:39Z-
dc.date.available2014-12-08T15:20:39Z-
dc.date.issued2011-11-01en_US
dc.identifier.issn0018-9200en_US
dc.identifier.urihttp://dx.doi.org/10.1109/JSSC.2011.2164019en_US
dc.identifier.urihttp://hdl.handle.net/11536/14681-
dc.description.abstractA single-inductor dual-output (SIDO) step-down DC-DC converter with continuous conduction mode (CCM) operation is proposed to achieve an area-efficient power management module. The low-voltage energy distribution controller (LV-EDC) can simultaneously guarantee good voltage regulation and low output voltage ripple. With the proposed dual-mode energy delivery methodology, cross regulation in steady-state output voltage ripple, which is rarely discussed, and cross regulation in load transient response are both effectively reduced. In addition, the energy mode transition operation helps obtain the appropriate energy operation mode using the energy delivery paths for dual outputs. Moreover, within the allowable output voltage ripple, the automatic energy bypass (AEB) mechanism can reduce the number of energy delivery paths, thereby ensuring voltage regulation and further enhancing efficiency. The test chip, fabricated in 55-nm CMOS, occupies 1.44 mm(2) and achieves 91% peak efficiency, low output voltage ripple, and excellent load transient response for a high-efficiency system-on-a-chip (SoC) integration.en_US
dc.language.isoen_USen_US
dc.subjectCross regulationen_US
dc.subjectenergy bypass mechanismen_US
dc.subjectenergy delivery pathen_US
dc.subjectload transient responseen_US
dc.subjectoutput voltage rippleen_US
dc.subjectpower conversion efficiencyen_US
dc.subjectsingle-inductor dual-output (SIDO) converteren_US
dc.titleMinimized Transient and Steady-State Cross Regulation in 55-nm CMOS Single-Inductor Dual-Output (SIDO) Step-Down DC-DC Converteren_US
dc.typeArticleen_US
dc.identifier.doi10.1109/JSSC.2011.2164019en_US
dc.identifier.journalIEEE JOURNAL OF SOLID-STATE CIRCUITSen_US
dc.citation.volume46en_US
dc.citation.issue11en_US
dc.citation.spage2488en_US
dc.citation.epage2499en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000296234100006-
dc.citation.woscount10-
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