標題: Effective Power Network Prototyping via Statistical-Based Clustering and Sequential Linear Programming
作者: Liu, Sean Shih-Ying
Lee, Chieh-Jui
Huang, Chuan-Chia
Chen, Hung-Ming
Lin, Chang-Tzu
Lee, Chia-Hsin
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-Jan-2013
摘要: In this paper, we propose a framework that automatically generates a power network based on given placed design and verifies the power network by the commercial tool without IR and Electro-Migration (EM) violations. Our framework integrates synthesis, optimization and analysis of power network. A deterministic method is proposed to decide number and location of power stripes based on clustering analysis. After an initial power network is synthesized, we propose a sensitivity matrix G(s) which is the correlation between updates in stripe resistance and nodal voltage. An optimization scheme based on Sequential Linear Programming (SLP) is applied to iteratively adjust power network to satisfy a given IR drop constraint. The proposed framework constantly updates voltage distribution in response to incremental change in power network. To accurately capture voltage distribution on a given chip, our power network models every existing power stripes and via resistances on each layer. Experimental result demonstrates that our power network analysis can accurately capture voltage distribution on a given chip and effectively minimize power network area. The proposed methodology is experimented on two real designs in TSMC 90nm and UMC 90nm technology respectively and achieves 9%-32% reduction in power network area, compared with the results from modern commercial PG synthesizer.
URI: http://hdl.handle.net/11536/146841
ISSN: 1530-1591
期刊: DESIGN, AUTOMATION & TEST IN EUROPE
起始頁: 1701
結束頁: 1706
Appears in Collections:Conferences Paper