完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, Wei-Ling | en_US |
dc.contributor.author | Su, Jen-Yi | en_US |
dc.contributor.author | Meng, Chinchun | en_US |
dc.contributor.author | Chang, Chia-Hung | en_US |
dc.contributor.author | Huang, Guo-Wei | en_US |
dc.date.accessioned | 2018-08-21T05:57:07Z | - |
dc.date.available | 2018-08-21T05:57:07Z | - |
dc.date.issued | 2017-01-01 | en_US |
dc.identifier.issn | 1529-2517 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/147062 | - |
dc.description.abstract | A V-band balanced two-stage power amplifier MMICs with Lange couplers is demonstrated using 0.15 mu m GaAs pHEMT technology in this paper. A CPWG-MS-CPWG topology with via holes at the transistors as the transition between coplanar waveguide with backside ground (CPWG) and microstrip (MS) is employed for the two-stage amplifier. CPWG is applied to realize the flip-chip transition interface for both input and output ports of the amplifier and inter-stage MS matching has the advantage of small size. The structure parameters of the CPWG Lange coupler and matching network are designed and optimized for power combining. Finally, a 60-GHz balanced two-stage power amplifier using a CPWG-MS-CPWG structure delivers the small signal gain of 18 dB, OP1dB of 12 dBm and P-sat of 15 dBm. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Coplanar waveguide with backside ground (CPWG) | en_US |
dc.subject | flip-chip | en_US |
dc.subject | microstrip (MS) | en_US |
dc.subject | pseudomorphic high electron mobility transistor (pHEMT) | en_US |
dc.subject | power amplifier | en_US |
dc.subject | power combining | en_US |
dc.title | V-band Flip-Chip pHEMT Balanced Power Amplifier with CPWG-MS-CPWG Topology and CPWG Lange Couplers | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2017 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM (RFIC) | en_US |
dc.citation.spage | 19 | en_US |
dc.citation.epage | 22 | en_US |
dc.contributor.department | 電機工程學系 | zh_TW |
dc.contributor.department | Department of Electrical and Computer Engineering | en_US |
dc.identifier.wosnumber | WOS:000426956400005 | en_US |
顯示於類別: | 會議論文 |