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dc.contributor.authorTso, Chia-Tsungen_US
dc.contributor.authorLiu, Tung-Yuen_US
dc.contributor.authorPan, Fu-Mingen_US
dc.contributor.authorSheu, Jeng-Tzongen_US
dc.date.accessioned2019-04-02T05:59:58Z-
dc.date.available2019-04-02T05:59:58Z-
dc.date.issued2017-04-01en_US
dc.identifier.issn0021-4922en_US
dc.identifier.urihttp://dx.doi.org/10.7567/JJAP.56.04CD14en_US
dc.identifier.urihttp://hdl.handle.net/11536/147858-
dc.description.abstractThe temperature effects of both gate-all-around polycrystalline silicon nanowire (GAA poly-Si NW) junctionless (JL) and inversion mode (IM) transistor devices at various temperatures (77-410 K) were investigated. The electrical characteristics of these devices, such as subthreshold swing (SS), threshold voltage (Vth), and drain-induced barrier lowering (DIBL), were also characterized and compared in this study. Moreover, JL devices with different doping concentrations at various temperatures were also discussed. Both Vth and I-on showed significant doping concentration dependences for JL devices with doping concentrations of 1 x 10(19) and 5 x 10(19) cm(-3). However, the electrical characteristics of JL devices showed less thermal sensitivity when the doping concentration reached 10(20) cm(-3) . (C) 2017 The Japan Society of Applied Physicsen_US
dc.language.isoen_USen_US
dc.titleTemperature- and doping-concentration-dependent characteristics of junctionless gate-all-around polycrystalline-silicon thin-film transistorsen_US
dc.typeArticleen_US
dc.identifier.doi10.7567/JJAP.56.04CD14en_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICSen_US
dc.citation.volume56en_US
dc.contributor.department材料科學與工程學系zh_TW
dc.contributor.department生醫工程研究所zh_TW
dc.contributor.departmentDepartment of Materials Science and Engineeringen_US
dc.contributor.departmentInstitute of Biomedical Engineeringen_US
dc.identifier.wosnumberWOS:000414623100019en_US
dc.citation.woscount1en_US
Appears in Collections:Articles