標題: | A Hardware-Scalable DSP Architecture for Beam Selection in mm-Wave MU-MIMO Systems |
作者: | Yeh, Chun-Yu Chu, Ting-Chung Chen, Chiao-En Yang, Chia-Hsiang 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Beam selection;hybrid beamformer;beamspace MIMO;mm-wave;CORDIC |
公開日期: | 1-十一月-2018 |
摘要: | Millimeter-wave (mm-Wave) communication, operating from 30- to 300-GHz bands with wider available spectrum, has now emerged as a promising solution for future wireless systems. To reduce the hardware complexity of mm-Wave transceivers, beam-selection techniques combined with beamspace multiple-input multiple-output (MIMO) communications have been proposed in the literature. In such a system, beam selection is performed to exploit the near-sparse nature in the mm-Wave channel and, hence, is crucial to the system performance. This paper presents the world's first digital signal processing (DSP) architecture design for beam selection operation in an mm-Wave multi-user MIMO system. A computationally efficient beam-selection algorithm is first presented. Based on the proposed algorithm, a hardware-scalable beam selection processor is implemented using coordinate rotation digital computers arithmetic. To establish the validity of the concept, the proposed processor is implemented in a 40-nm CMOS technology, integrating 360k logic gates in an area of 0.5625 mm(2), while dissipating 44 mW at 266 MHz in an MU-MIMO system with 16 beams and 8 users. |
URI: | http://dx.doi.org/10.1109/TCSI.2018.2856124 http://hdl.handle.net/11536/148270 |
ISSN: | 1549-8328 |
DOI: | 10.1109/TCSI.2018.2856124 |
期刊: | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS |
Volume: | 65 |
起始頁: | 3918 |
結束頁: | 3928 |
顯示於類別: | 期刊論文 |