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dc.contributor.authorChen, You-Daen_US
dc.contributor.authorChin, Alberten_US
dc.date.accessioned2019-04-02T06:00:27Z-
dc.date.available2019-04-02T06:00:27Z-
dc.date.issued2019-02-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2018.2886552en_US
dc.identifier.urihttp://hdl.handle.net/11536/148817-
dc.description.abstractThe uneven sneak-path currents in resistive random access memory (RRAM) severely constrain the array size. To overcome this issue, we propose an innovative readout scheme that can fully offset the sneak-path currents in one-resistor (1R) RRAM array. Furthermore, the bit cell resistance (R-cell) in an RRAM array can be simply evaluated as the ratio of read voltage (V-read) to the sensed offset current (I-offset). Even under extreme device distribution, a 512x512 array size is still obtained. This is the largest array among simple 1R RRAM, without using a selector device or extra transistor.en_US
dc.language.isoen_USen_US
dc.subjectNonvolatileen_US
dc.subjectresistive random access memory (RRAM)en_US
dc.subjectcross-point arrayen_US
dc.subjectsneak currenten_US
dc.subjectcurrent sensingen_US
dc.titleAn Offset Readout Current Sensing Scheme for One-Resistor RRAM-Based Cross-Point Arrayen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2018.2886552en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume40en_US
dc.citation.spage208en_US
dc.citation.epage211en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000457606300013en_US
dc.citation.woscount0en_US
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