完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | MA, KP | en_US |
| dc.contributor.author | LIN, CT | en_US |
| dc.contributor.author | CHENG, HC | en_US |
| dc.date.accessioned | 2019-04-02T05:59:13Z | - |
| dc.date.available | 2019-04-02T05:59:13Z | - |
| dc.date.issued | 1995-09-01 | en_US |
| dc.identifier.issn | 0021-4922 | en_US |
| dc.identifier.uri | http://dx.doi.org/10.1143/JJAP.34.L1100 | en_US |
| dc.identifier.uri | http://hdl.handle.net/11536/149133 | - |
| dc.description.abstract | By implanting BF2+ ions into thin polycrystalline Si films with subsequent low-temperature (as low as 500 degrees C) annealing, excellent Pt-silicided shallow p(+)n junctions have been formed. The samples implanted under the conditions of 100 keV/5 x 10(15) cm(-2) showed a leakage of 7 nA/cm(2) and a junction depth of about 0.05 mu m after 500 degrees C annealing, and the current leakages further decreased to a value at about 2 nA/cm(2) when the annealing temperature was raised to 550 degrees C. Various conditions of implant and annealing were examined to determine and characterize their effects on the resultant junctions. | en_US |
| dc.language.iso | en_US | en_US |
| dc.subject | SHALLOW JUNCTION | en_US |
| dc.subject | LOW-TEMPERATURE ANNEALING | en_US |
| dc.subject | JUNCTION DEPTH | en_US |
| dc.title | NOVEL TECHNIQUE TO FORM PT-SILICIDED SHALLOW P(+)N JUNCTIONS USING LOW-TEMPERATURE PROCESSES | en_US |
| dc.type | Article | en_US |
| dc.identifier.doi | 10.1143/JJAP.34.L1100 | en_US |
| dc.identifier.journal | JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS | en_US |
| dc.citation.volume | 34 | en_US |
| dc.contributor.department | 奈米中心 | zh_TW |
| dc.contributor.department | Nano Facility Center | en_US |
| dc.identifier.wosnumber | WOS:A1995RV19100002 | en_US |
| dc.citation.woscount | 0 | en_US |
| 顯示於類別: | 期刊論文 | |

