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dc.contributor.authorTSENG, HCen_US
dc.contributor.authorCHANG, CYen_US
dc.contributor.authorPAN, FMen_US
dc.contributor.authorCHEN, LPen_US
dc.date.accessioned2019-04-02T05:59:14Z-
dc.date.available2019-04-02T05:59:14Z-
dc.date.issued1995-10-01en_US
dc.identifier.issn0021-8979en_US
dc.identifier.urihttp://dx.doi.org/10.1063/1.359818en_US
dc.identifier.urihttp://hdl.handle.net/11536/149138-
dc.description.abstractThe epitaxial silicon layer selectively grown on the reactive ion etched (RIE) silicon substrate using CF4, CHF3 and Ar etching gases has been studied. Defects and contaminants induced by the RIE process result in a rough epilayer, and degrade the current-voltage (I-V) characteristics. An interfacial carbide layer is present between the epilayer and the RIE treated substrate. Using an efficient and convenient after-etching treatment with a CF4/O-2 low-energy plasma, we obtain a clean Si surface in the patterned oxide windows for selective epitaxial growth, and the electrical characteristics are significantly improved. (C) 1995 American Institute of Physics.en_US
dc.language.isoen_USen_US
dc.titleEFFECTS OF DRY-ETCHING DAMAGE REMOVAL ON LOW-TEMPERATURE SILICON SELECTIVE EPITAXIAL-GROWTHen_US
dc.typeArticleen_US
dc.identifier.doi10.1063/1.359818en_US
dc.identifier.journalJOURNAL OF APPLIED PHYSICSen_US
dc.citation.volume78en_US
dc.citation.spage4710en_US
dc.citation.epage4714en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:A1995RW89200058en_US
dc.citation.woscount9en_US
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