A neural network-based procedure for the process monitoring of clustered defects in integrated circuit fabrication

Abstract

In integrated circuit (IC) fabrication, a wafer's defects tend to cluster. As the wafer size increases, the clustering phenomenon of the defects becomes increasingly apparent. When the conventional control chart (c chart) is used, the clustered defects frequently cause many false alarms. In this study, we propose a neural network-based procedure for the process monitoring of clustered defects in IC fabrication. The proposed procedure can reduce the phenomenon of the false alarms caused by the clustered defects. A case study is also presented to show the effectiveness of the proposed procedure. (C) 1997 Elsevier Science B.V.