完整後設資料紀錄
DC 欄位語言
dc.contributor.authorLin, Jun-Shuwen_US
dc.date.accessioned2014-12-08T15:21:03Z-
dc.date.available2014-12-08T15:21:03Z-
dc.date.issued2011-02-15en_US
dc.identifier.issn0957-4174en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.eswa.2011.08.144en_US
dc.identifier.urihttp://hdl.handle.net/11536/14961-
dc.description.abstractAs the wafer size increases, the clustering phenomenon of defects becomes significant. In addition to clustered defects, various clustering patterns also influence the wafer yield. In fact, the recognition of clustering pattern usually exists fuzziness. However, the wafer yield models in previous studies did not consider the fuzziness of clustering pattern belonging to which shape in recognition. Therefore, the objective of this study is to develop a new fuzzy variable of clustering pattern (FVCP) by using fuzzy logic control, and predict the wafer yield by using back-propagation neural network (BPNN) incorporating ant colony optimization (ACO). The proposed method utilizes defect counts, cluster index (CI), and FVCP as inputs for ACO-BPNN. A simulated study is utilized to demonstrate the effectiveness of the proposed model. (C) 2011 Elsevier Ltd. All rights reserved.en_US
dc.language.isoen_USen_US
dc.titleConstructing a yield model for integrated circuits based on a novel fuzzy variable of clustered defect patternen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.eswa.2011.08.144en_US
dc.identifier.journalEXPERT SYSTEMS WITH APPLICATIONSen_US
dc.citation.volume39en_US
dc.citation.issue3en_US
dc.citation.spage2856en_US
dc.citation.epage2864en_US
dc.contributor.department工業工程與管理學系zh_TW
dc.contributor.departmentDepartment of Industrial Engineering and Managementen_US
dc.identifier.wosnumberWOS:000297823300066-
dc.citation.woscount2-
顯示於類別:期刊論文