標題: | A unified approach to profiling the lateral distributions of both oxide charge and interface states in n-MOSFET's under various bias stress conditions |
作者: | Cheng, SM Yih, CM Yeh, JC Kuo, SN Chung, SS 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-十一月-1997 |
摘要: | A new and accurate technique that allows the simultaneous determination of the spatial distributions of both interface states (N-it) and oxide charge (Q(ox)) will be presented. The gated-diode current measurement in combination with the gate-induced drain leakage (GIDL) current were performed to monitor the generation of both N-it and Q(ox) in n-MOSFET's. A special detrapping technique and simple calculations have been developed, from which the spatial distributions of both N-it and Q(ox) under various bias stress conditions, such as the hot-electron stress (I-G,I-max), I-B,I-max, and hot-hole stresses, can be determined. The calculation of gated-diode current by incorporating the extracted profiles of N-it and Q(ox) has been justified from numerical simulation. Results show very good agreement with the experimental results. The extracted interface damages for hot-electron and hot-hole stresses have very important applications for the study of hot-carrier reliability issues, in particular, on the design of flash EPROM, (EPROM)-P-2 cells since the above stress conditions, such as the I-G,I-max and hot-hole stress, are the major operating conditions for device programming and erasing, respectively. |
URI: | http://dx.doi.org/10.1109/16.641360 http://hdl.handle.net/11536/149669 |
ISSN: | 0018-9383 |
DOI: | 10.1109/16.641360 |
期刊: | IEEE TRANSACTIONS ON ELECTRON DEVICES |
Volume: | 44 |
起始頁: | 1908 |
結束頁: | 1914 |
顯示於類別: | 期刊論文 |