完整後設資料紀錄
DC 欄位語言
dc.contributor.authorHu, Jwu-Shengen_US
dc.contributor.authorChen, Keng-Yuanen_US
dc.date.accessioned2019-04-02T05:57:55Z-
dc.date.available2019-04-02T05:57:55Z-
dc.date.issued2010-12-01en_US
dc.identifier.issn1051-2004en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.dsp.2010.03.005en_US
dc.identifier.urihttp://hdl.handle.net/11536/149994-
dc.description.abstractThis paper reports the analysis and design method of receding finite horizon constrained optimization approaches to generate driving signals for digital amplifiers. The performance of a digital amplifier that is based on power MOSFETs highly depends on the modulator that modulates the reference signal into binary sequences. The concept of receding finite horizon constrained optimization modulator is to generate the binary output in the sense that the power of filtered error is minimized. The stability analysis of this nonlinear feedback system is derived in detail and the method to estimate the bound of filtered error of the high dimensional quantization is proposed. A second order system with horizon length one and two is designed to produce a 1.5-bit constrained output. Simulation results demonstrate the accuracy of the analysis. (C) 2010 Elsevier Inc. All rights reserved.en_US
dc.language.isoen_USen_US
dc.subjectAmplifiersen_US
dc.subjectDigital filteren_US
dc.subjectModulationen_US
dc.subjectQuantizationen_US
dc.subjectReceding horizon quadratic optimal controlen_US
dc.titleAnalysis and design of the receding horizon constrained optimization for class-D amplifier driving signalsen_US
dc.typeArticleen_US
dc.identifier.doi10.1016/j.dsp.2010.03.005en_US
dc.identifier.journalDIGITAL SIGNAL PROCESSINGen_US
dc.citation.volume20en_US
dc.citation.spage1511en_US
dc.citation.epage1525en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000280696400002en_US
dc.citation.woscount5en_US
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