Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Da-Yuan | en_US |
dc.contributor.author | Chen, C. C. | en_US |
dc.contributor.author | Huang, C. H. | en_US |
dc.contributor.author | Lim, P. S. | en_US |
dc.contributor.author | Chan, M. H. | en_US |
dc.contributor.author | Yeh, M. S. | en_US |
dc.contributor.author | Huang, C. S. | en_US |
dc.contributor.author | Tao, H. J. | en_US |
dc.contributor.author | Mii, Y. J. | en_US |
dc.date.accessioned | 2019-04-02T06:04:43Z | - |
dc.date.available | 2019-04-02T06:04:43Z | - |
dc.date.issued | 2008-01-01 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/VTSA.2008.4530790 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/151150 | - |
dc.description.abstract | In this paper, a novel surface treatment technique using Silicon Surface Pre-Treatment (SSPT) technique to boost high performance CMOS circuit is reported. This approach provides a smooth silicon surface and extends the effective channel width to enhance device performance on both N and PMOSFET. In this work, a smooth and rounded active area (AA) surface was successfully fabricated. Using this technique, we demonstrated a significant device boost of 15% and 7% on small dimension N and PMOSFET, respectively. These achievements were demonstrated without negative impact on GOI and NBTI. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Novel Silicon Surface Pre-Treatment (SSPT) technique for CMOS device performance boosting | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.doi | 10.1109/VTSA.2008.4530790 | en_US |
dc.identifier.journal | 2008 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATIONS (VLSI-TSA), PROCEEDINGS OF TECHNICAL PROGRAM | en_US |
dc.citation.spage | 42 | en_US |
dc.contributor.department | 光電工程學系 | zh_TW |
dc.contributor.department | Department of Photonics | en_US |
dc.identifier.wosnumber | WOS:000256564900019 | en_US |
dc.citation.woscount | 0 | en_US |
Appears in Collections: | Conferences Paper |