Architectural Synthesis Frameworks on Distributed Register-File Microarchitecture Family

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DC Field	Value	Language
dc.contributor.author	Chen, Chia-I	en_US
dc.contributor.author	Huang, Juinn-Dar	en_US
dc.date.accessioned	2014-12-08T15:21:19Z	-
dc.date.available	2014-12-08T15:21:19Z	-
dc.date.issued	2011	en_US
dc.identifier.isbn	978-0-7695-4447-2	en_US
dc.identifier.issn	2159-3477	en_US
dc.identifier.uri	http://hdl.handle.net/11536/15132	-
dc.identifier.uri	http://dx.doi.org/10.1109/ISVLSI.2011.19	en_US
dc.language.iso	en_US	en_US
dc.title	Architectural Synthesis Frameworks on Distributed Register-File Microarchitecture Family	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.doi	10.1109/ISVLSI.2011.19	en_US
dc.identifier.journal	2011 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI)	en_US
dc.citation.spage	369	en_US
dc.citation.epage	370	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000298386100081	-
Appears in Collections:	Conferences Paper

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