Grain Boundary Trap-Induced Current Transient in a 3-D NAND Flash Cell String

doi:10.1109/TED.2019.2900736

標題:	Grain Boundary Trap-Induced Current Transient in a 3-D NAND Flash Cell String
作者:	Lin, Wei-Liang Tsai, Wen-Jer Cheng, C. C. Ku, S. H. Liu, Lenvis Hwang, S. W. Lu, Tao-Cheng Chen, Kuang-Chao Tseng, Tseung-Yuen Lu, Chih-Yuan 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
關鍵字:	3-D NAND flash;cell current/threshold voltage instability;gate-all-around (GAA);grain boundary trap (GBT);nonvolatile memory;polycrystalline silicon channel;program verify (PV);transient;trapping/detrapping
公開日期:	1-四月-2019
摘要:	Transient cell current caused by the trapping/detrapping of grain boundary traps in the polycrystalline silicon (poly-Si) channel of a 3-D NAND cell string is comprehensively studied in this paper. This transient has a time constant of 10 mu s or longer and is strongly dependent on the bias history. It is also affected by the trap distribution as revealed by TCAD simulations. Sensing offset between program verify and read results in "pseudo" charge loss/gain that reduces the sensing margin. The posttreatment of the poly-Si channel is suggested to mitigate this effect.
URI:	http://dx.doi.org/10.1109/TED.2019.2900736 http://hdl.handle.net/11536/151585
ISSN:	0018-9383
DOI:	10.1109/TED.2019.2900736
期刊:	IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume:	66
Issue:	4
起始頁:	1734
結束頁:	1740
顯示於類別：	期刊論文