標題: | An Integrated. PPG and. ECG Signal Processing Hardware Architecture Design of EEMD Processor |
作者: | Fang, Wai-Chi Chen, I-Wei 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Photoplethysmogram;Electrocardiography;Field Programmable Gate Array (EPGA);Ensemble Empirical Mode Decomposition (EEMD) |
公開日期: | 1-一月-2019 |
摘要: | This study proposed an integrated Photoplethysmogram (PPG) and Electrocardiography (ECG) simal processing hardware architecture design based on Ensemble Empirical Mode Decomposition (EEMD) The proposed integrated dual signals EEMD processor is implemented in an on-board FPGA for on-line signal processing of the non-linear and non-stationary signal. The EEMD method is appropriate to analyze the non-linear PPG and ECG signals with assisting white noise and decompose the signal into 8 sets of Intrinsic Mode Functions (MI's). The experimental results show that the hardware architecture proposed in this study can be applied to PPG and ECG signals, and can clearly analyze and separate high-frequency and low frequency noise, and keep clear signals without any noise. |
URI: | http://hdl.handle.net/11536/151716 |
ISBN: | 978-1-5386-7910-4 |
ISSN: | 2158-3994 |
期刊: | 2019 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS (ICCE) |
起始頁: | 0 |
結束頁: | 0 |
顯示於類別: | 會議論文 |