完整後設資料紀錄
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dc.contributor.authorFang, Wai-Chien_US
dc.contributor.authorChen, I-Weien_US
dc.date.accessioned2019-05-02T00:26:47Z-
dc.date.available2019-05-02T00:26:47Z-
dc.date.issued2019-01-01en_US
dc.identifier.isbn978-1-5386-7910-4en_US
dc.identifier.issn2158-3994en_US
dc.identifier.urihttp://hdl.handle.net/11536/151716-
dc.description.abstractThis study proposed an integrated Photoplethysmogram (PPG) and Electrocardiography (ECG) simal processing hardware architecture design based on Ensemble Empirical Mode Decomposition (EEMD) The proposed integrated dual signals EEMD processor is implemented in an on-board FPGA for on-line signal processing of the non-linear and non-stationary signal. The EEMD method is appropriate to analyze the non-linear PPG and ECG signals with assisting white noise and decompose the signal into 8 sets of Intrinsic Mode Functions (MI's). The experimental results show that the hardware architecture proposed in this study can be applied to PPG and ECG signals, and can clearly analyze and separate high-frequency and low frequency noise, and keep clear signals without any noise.en_US
dc.language.isoen_USen_US
dc.subjectPhotoplethysmogramen_US
dc.subjectElectrocardiographyen_US
dc.subjectField Programmable Gate Array (EPGA)en_US
dc.subjectEnsemble Empirical Mode Decomposition (EEMD)en_US
dc.titleAn Integrated. PPG and. ECG Signal Processing Hardware Architecture Design of EEMD Processoren_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS (ICCE)en_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000462912600201en_US
dc.citation.woscount0en_US
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