完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Huang, Juinn-Dar | en_US |
dc.contributor.author | Liu, Chia-Hung | en_US |
dc.contributor.author | Yang, Wei-Hao | en_US |
dc.date.accessioned | 2019-05-02T00:26:47Z | - |
dc.date.available | 2019-05-02T00:26:47Z | - |
dc.date.issued | 2018-01-01 | en_US |
dc.identifier.isbn | 978-1-5386-4756-1 | en_US |
dc.identifier.issn | 2324-8432 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/151722 | - |
dc.description.abstract | Digital microfluidic biochip (DMFB) is a tiny device that can carry out a rich set of bioassays without the need of bulky equipment. However, designing a good general-purpose DMFB architecture is still considered a big challenge today. NP-hard synthesis problems make on-line synthesis virtually impossible on exiting array-based architectures. In this paper, we first elaborate on the major concerns in a DMFB design flow, from the aspects of both synthesis and physical design. We then propose a versatile ring-based architecture VERBA and its corresponding fast one-pass synthesis flow. Experimental results show that VERBA incorporated with the proposed synthesis flow is a better solution than existing architectures and synthesis algorithms especially for real-time cyber-physical systems. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Versatile Ring-Based Architecture and Synthesis Flow for General-Purpose Digital Microfluidic Biochips | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | PROCEEDINGS OF THE 2018 26TH IFIP/IEEE INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC) | en_US |
dc.citation.spage | 13 | en_US |
dc.citation.epage | 18 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000462970000008 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |