標題: A novel no-dead-time sinusoidal modulation method for three phase inverter
作者: Jeng, Shyr-Long
Wu, Chih-Chiang
機械工程學系
Department of Mechanical Engineering
關鍵字: no-dead-time modulation;three phase voltage source inverter (VSI);PSIM
公開日期: 1-Jan-2017
摘要: A lthough the dead time in pulse-width modulation (PWM) inverters prevents short circuiting of the dc source, it also causes serious problems such as waveform distortion and voltage decreases. In this paper, a novel modulation method that combines the concepts of a six-step square wave and space vector modulation (SVM) is proposed. Compared with the conventional SVM methods in which the dead time should be set to avoid short circuiting problems, the proposed novel no-dead-time modulation method not only increases the switching frequency potential by enabling one transistor at a time in each phase leg without considering dead time setting but also reduces the switching loss with only three transistors operating in every section in one cycle of rotation. The PWM duty ratio formula of the specified section for each power transistor is derived and verified using software for power electronics simulation (PSIM). The simulation model of this novel modulation method is constructed and tested by using a three-phase inductance-resistance load. The simulation results are presented to confirm the validity of the proposed modulation method.
URI: http://hdl.handle.net/11536/151746
ISBN: 978-1-5386-3202-4
期刊: PROCEEDINGS OF THE 2017 IEEE INTERNATIONAL CONFERENCE ON INFORMATION, COMMUNICATION AND ENGINEERING (IEEE-ICICE 2017)
起始頁: 24
結束頁: 27
Appears in Collections:Conferences Paper