標題: A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology
作者: Wang, Kai-Yen
Ho, Yun-Lung
Huang, Yu-De
Fang, Wai-Chi
交大名義發表
電子工程學系及電子研究所
National Chiao Tung University
Department of Electronics Engineering and Institute of Electronics
關鍵字: Real Time EEG;EEG signal processing;CMOS 28nm tehnology;ORICA algorithm;de-artifact process
公開日期: 1-Jan-2018
摘要: In this paper, we propose a system-on-chip(SOC) design of highly effective multi-channel real-time EEG signal processing system based on Online-Recursive Independent Component Analysis (ORICA) algorithm implemented using TSMC's 28nm CMOS technology. In this chip, concepts of system-on-chip (SOC) design and effective system integration technique are well-combined together to realize a highly miniaturized realtime EEG processing system.. The core area and total power consumption of the chip are respectively 1246* 1246 mu m2 and 25.03mW. The chip operations were validated by ADVANTEST V93000 PS1600 and the results obtained match with the software simulation. The average correlation coefficient between original source signals and extracted ORICA signals reaches 0.9572. Eye blink artifact, and facial muscle artifact will be removed automatically. Producing a pure EEG signal is beneficial for realtime data analysis; therefore, this chip design can enhance the reliability and feasibility of EEG-related applications, such as BCI, medical diagnosis and depth of anesthesia detection.
URI: http://hdl.handle.net/11536/152002
ISBN: 978-1-5386-6318-9
ISSN: 1520-6130
期刊: PROCEEDINGS OF THE 2018 IEEE INTERNATIONAL WORKSHOP ON SIGNAL PROCESSING SYSTEMS (SIPS)
起始頁: 269
結束頁: 274
Appears in Collections:Conferences Paper