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dc.contributor.authorLuc, Q. H.en_US
dc.contributor.authorFan-Chiang, C. C.en_US
dc.contributor.authorHuynh, S. H.en_US
dc.contributor.authorHuang, P.en_US
dc.contributor.authorDo, H. B.en_US
dc.contributor.authorHa, M. T. H.en_US
dc.contributor.authorJin, Y. D.en_US
dc.contributor.authorNguyen, T. A.en_US
dc.contributor.authorZhang, K. Y.en_US
dc.contributor.authorWang, H. C.en_US
dc.contributor.authorLin, Y. K.en_US
dc.contributor.authorLin, Y. C.en_US
dc.contributor.authorHu, C.en_US
dc.contributor.authorIwai, H.en_US
dc.contributor.authorChang, E. Y.en_US
dc.date.accessioned2019-06-03T01:09:17Z-
dc.date.available2019-06-03T01:09:17Z-
dc.date.issued2018-01-01en_US
dc.identifier.isbn978-1-5386-4218-4en_US
dc.identifier.urihttp://hdl.handle.net/11536/152028-
dc.description.abstractWe demonstrate, for the first time, the negative capacitance (NC) In0.53Ga0.47As nMOSFET with 8-nm Hf0.5Zr0.5O2 (HZO) as ferroelectric (FE) dielectric for sub-60 mV/dec subthreshold swing (SS). The impact of annealing treatments on the FE properties and electrical characteristics of NC InGaAs nMOSFETs are investigated. Optimized annealing condition results in NC effects at the HZO/Al2O3/InGaAs nMOSFETs with steep SS property (similar to 11 mV/dec).en_US
dc.language.isoen_USen_US
dc.titleFirst Experimental Demonstration of Negative Capacitance InGaAs MOSFETs With Hf0.5Zr0.5O2 Ferroelectric Gate Stacken_US
dc.typeProceedings Paperen_US
dc.identifier.journal2018 IEEE SYMPOSIUM ON VLSI TECHNOLOGYen_US
dc.citation.spage47en_US
dc.citation.epage48en_US
dc.contributor.department交大名義發表zh_TW
dc.contributor.departmentNational Chiao Tung Universityen_US
dc.identifier.wosnumberWOS:000465075200016en_US
dc.citation.woscount4en_US
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