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dc.contributor.authorCheng, Chun-Huen_US
dc.contributor.authorChin, Alberten_US
dc.contributor.authorHsu, Hsiao-Hsuanen_US
dc.date.accessioned2019-08-02T02:15:33Z-
dc.date.available2019-08-02T02:15:33Z-
dc.date.issued2019-12-01en_US
dc.identifier.issn1533-4880en_US
dc.identifier.urihttp://dx.doi.org/10.1166/jnn.2019.16781en_US
dc.identifier.urihttp://hdl.handle.net/11536/152225-
dc.description.abstractOptimal device integrity was achieved in Ni/SiGeOx/TiOy/TaN resistive memory by using a formingfree switch with a low switching power of 790 mu W, stable endurance of 10(4) cycles, optimal retention time of 10(5) s, resistance window of at least 1150x, and tight current distributions at 85 degrees C. These characteristics are attributed to the low current switching obtained using SiGeOx with a high oxygen vacancy density and highly defective TiOy grain boundaries.en_US
dc.language.isoen_USen_US
dc.subjectResistive Memoryen_US
dc.subjectSiGeOxen_US
dc.subjectTiOyen_US
dc.subjectCurrent Distributionen_US
dc.subjectSwitching Poweren_US
dc.titleForming-Free SiGeOx/TiOy Resistive Random Access Memories Featuring Large Current Distribution Windowsen_US
dc.typeArticleen_US
dc.identifier.doi10.1166/jnn.2019.16781en_US
dc.identifier.journalJOURNAL OF NANOSCIENCE AND NANOTECHNOLOGYen_US
dc.citation.volume19en_US
dc.citation.issue12en_US
dc.citation.spage7916en_US
dc.citation.epage7919en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000473105800056en_US
dc.citation.woscount0en_US
Appears in Collections:Articles


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