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dc.contributor.authorChuang, Chun-Yenen_US
dc.contributor.authorChang, Wei-Fanen_US
dc.contributor.authorWei, Chia-Chienen_US
dc.contributor.authorHo, Ching-Juen_US
dc.contributor.authorHuang, Cheng-Yuen_US
dc.contributor.authorShi, Jin-Weien_US
dc.contributor.authorHenrickson, Lindoren_US
dc.contributor.authorChen, Young-Kaien_US
dc.contributor.authorChen, Jyehongen_US
dc.date.accessioned2019-08-02T02:24:19Z-
dc.date.available2019-08-02T02:24:19Z-
dc.date.issued2019-01-01en_US
dc.identifier.isbn978-1-9435-8053-8en_US
dc.identifier.urihttp://hdl.handle.net/11536/152469-
dc.description.abstractA pruned Volterra equalizer that reduces computational complexity by up to 85.2% in 112-Gbps PAM-4 optical interconnects is proposed. The BER performance is competitive with LASSO-based Volterra equalizers, and training time is twice as fast.en_US
dc.language.isoen_USen_US
dc.titleSparse Volterra Nonlinear Equalizer by Employing Pruning Algorithm for High-Speed PAM-4 850-nm VCSEL Optical Interconnecten_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 OPTICAL FIBER COMMUNICATIONS CONFERENCE AND EXHIBITION (OFC)en_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Photonicsen_US
dc.identifier.wosnumberWOS:000469837300320en_US
dc.citation.woscount0en_US
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