The Understanding of Breakdown Path in Both High-k Metal-Gate CMOS and Resistance RAM by the RTN Measurement

Abstract

The breakdown path which leads to the soft- and hard-breakdown in a MOSFET device can be identified from the experiment. It carries similar concept of the filament formation in RRAM device. Basically, RTN traps in the dielectric layers can be labeled as a pointer to trace the breakdown path, i.e., from the leakage by measuring the transistor's I-g current as a function of time. In CMOS, these traps can be considered as the leakage path in the gate dielectrics which eventually cause the final hard-breakdown. In RRAM device, these traps are closely related to the soft breakdown which is the key element of filament formation. The RTN analysis can also be utilized to examine the influences of RTN traps on the SBD paths. The instability of the switching resistance, caused by the traps will be illustrated.