完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wu, Chia-Hsun | en_US |
dc.contributor.author | Chen, Jian-You | en_US |
dc.contributor.author | Han, Ping-Cheng | en_US |
dc.contributor.author | Lee, Ming-Wen | en_US |
dc.contributor.author | Yang, Kun-Sheng | en_US |
dc.contributor.author | Wang, Huan-Chung | en_US |
dc.contributor.author | Chang, Po-Chun | en_US |
dc.contributor.author | Luc, Quang Ho | en_US |
dc.contributor.author | Lin, Yueh-Chin | en_US |
dc.contributor.author | Dee, Chang-Fu | en_US |
dc.contributor.author | Hamzah, Azrul Azlan | en_US |
dc.contributor.author | Chang, Edward Yi | en_US |
dc.date.accessioned | 2019-09-02T07:46:17Z | - |
dc.date.available | 2019-09-02T07:46:17Z | - |
dc.date.issued | 2019-08-01 | en_US |
dc.identifier.issn | 0018-9383 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TED.2019.2922301 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/152675 | - |
dc.description.abstract | A GaN metal-insulator-semiconductor high electronmobility transistor (MIS-HEMT) using tri-gate architecture and hybrid ferroelectric charge trap gate stack is demonstrated for normally-off operation. Compared with the conventional planar device, the tri-gate device has the 2-D electron gas (2-DEG) channel exposed on the nanowire sidewalls, so that the trapped charges in the HfON charge-trapping layer can easily deplete the channel from the sidewalls, leading to a high positive threshold voltage (V-th) to realize the normally-off operation. Moreover, through this electrostatic control on the sidewall, a high density of negative charge caused by hybrid ferroelectric charge trap gate stack with the optimized tri-gate structure, the tri-gate device can achieve normally-off GaN device with both low on-resistance (R-ON) and high positive V-th. The designed tri-gate device exhibits a high V-th of +2.61 V at current density (I-DS) = 1 mu A/mm, a high maximum current density (I-DS, MAX) of 896 mA/mm, a low R-ON of 5.0 Omega center dot mm and a high breakdown voltage (BV) of 788 V. To the best of our knowledge, the proposed tri-gate device shows the lowest specific on-resistance (R-ON,R- SP) among reported normallyoff GaN device results with BV > 650 V. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | AlGaN/GaN | en_US |
dc.subject | charge trap gate stack | en_US |
dc.subject | enhancement mode | en_US |
dc.subject | ferroelectric materials | en_US |
dc.subject | MIS-HEMT | en_US |
dc.subject | normally-off | en_US |
dc.subject | tri-gate | en_US |
dc.title | Normally-Off Tri-Gate GaN MIS-HEMTs with 0.76 m Omega center dot cm(2) Specific On-Resistance for Power Device Applications | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TED.2019.2922301 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | en_US |
dc.citation.volume | 66 | en_US |
dc.citation.issue | 8 | en_US |
dc.citation.spage | 3441 | en_US |
dc.citation.epage | 3446 | en_US |
dc.contributor.department | 材料科學與工程學系 | zh_TW |
dc.contributor.department | 光電系統研究所 | zh_TW |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | 國際半導體學院 | zh_TW |
dc.contributor.department | Department of Materials Science and Engineering | en_US |
dc.contributor.department | Institute of Photonic System | en_US |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.contributor.department | International College of Semiconductor Technology | en_US |
dc.identifier.wosnumber | WOS:000477697400030 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |