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dc.contributor.authorMuniandi, Balakumaren_US
dc.contributor.authorHuang, Chao-Jenen_US
dc.contributor.authorKuo, Chun-Chiehen_US
dc.contributor.authorYang, Te-Fuen_US
dc.contributor.authorChen, Ke-Horngen_US
dc.contributor.authorLin, Ying-Hsien_US
dc.contributor.authorLin, Shian-Ruen_US
dc.contributor.authorTsai, Tsung-Yenen_US
dc.date.accessioned2019-12-13T01:12:23Z-
dc.date.available2019-12-13T01:12:23Z-
dc.date.issued2019-11-01en_US
dc.identifier.issn1549-8328en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2019.2925374en_US
dc.identifier.urihttp://hdl.handle.net/11536/153233-
dc.description.abstractIn this paper, the proposed topology of a fully automated control (FAC) battery charger that provides turbo-boost operation and fully automated detection without any feedback from the system is discussed. It uses closed-loop control for automatic system load detection and automatically adjusts the battery discharge current. The advantages include shortened battery discharge time and maximum power provided by the adapter. Therefore, the FAC technique is flexible for any load system that is limited to battery chargers with the turbo boost mode support. In addition, to avoid over discharge, a battery protection circuitry is also included. The test chip is fabricated using a 0.25- $\mu \text{m}$ CMOS process, with a maximum efficiency of 94.58 & x0025; when the charger operates in the turbo boost mode, and achieves 97 & x0025; maximum efficiency when the charger operates in buck charge mode.en_US
dc.language.isoen_USen_US
dc.subjectClosed loop controlen_US
dc.subjectfully automatic detectionen_US
dc.subjectefficiencyen_US
dc.subjectself-calibrated discharging currenten_US
dc.subjectfully automated control topologyen_US
dc.subjectconstant current modeen_US
dc.subjectconstant voltage modeen_US
dc.titleA 97% Maximum Efficiency Fully Automated Control Turbo Boost Topology for Battery Chargersen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSI.2019.2925374en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.citation.volume66en_US
dc.citation.issue11en_US
dc.citation.spage4516en_US
dc.citation.epage4527en_US
dc.contributor.department電機工程學系zh_TW
dc.contributor.departmentDepartment of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000494680200036en_US
dc.citation.woscount0en_US
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