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dc.contributor.authorHuang, Yu-Anen_US
dc.contributor.authorYeh, Yu-Hsiangen_US
dc.contributor.authorLin, Horng-Chihen_US
dc.contributor.authorLi, Pei-Wenen_US
dc.date.accessioned2020-01-02T00:03:29Z-
dc.date.available2020-01-02T00:03:29Z-
dc.date.issued2019-01-01en_US
dc.identifier.issn2161-4636en_US
dc.identifier.urihttp://hdl.handle.net/11536/153342-
dc.description.abstractWe employed Sentaurus TCAD simulation to explore the impacts of major structural parameters on the electrical characteristics of poly-Si TFTs with T-gate and air spacers. The effects and trade-off between the source/drain (S/D) junctions relative to T-gate are discussed with the aim to find insightful information for the design and fabrication of real devices. Influences of the gate geometry on the parasitic capacitances of the T-gate devices are also simulated.en_US
dc.language.isoen_USen_US
dc.titleStructual Design of T-gate, Air-spacer Poly-Si TFTs for RF applicationsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 SILICON NANOELECTRONICS WORKSHOP (SNW)en_US
dc.citation.spage35en_US
dc.citation.epage36en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000501001400017en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper