標題: Scaling down of cobalt quantum-dots by colloidal route for non-volatile memory device application
作者: Yadav, Manoj
Velampati, Ravi Shankar R.
Mandal, Debaprasad
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: semiconductor quantum dots;colloids;silicon compounds;random-access storage;integrated circuit measurement;low-power electronics;cobalt;SiO2;Co;voltage 0;35 V to 4;0 V;size 1;0 nm to 2;0 nm;retention characteristics;C-t measurements;capacitance-time measurements;C-V measurements;capacitance-voltage measurements;floating-gate NVM device fabrication;scaled-down colloidal cobalt QDs;cobalt quantum-dot synthesis;floating gate memory device;low power NVM applications;sweep voltages;nonvolatile memory device application;colloidal route
公開日期: 23-十月-2019
摘要: The present work details the synthesis of cobalt quantum-dots (Co QDs) with size downscaling to 1-2 nm and their applications in non-volatile memory (NVM) devices. The process of colloidal synthesis is simple and provides the control over a wide range of QDs size. The scaled-down colloidal Co QDs are applied for the NVM device fabrication. Colloidal synthesised Co QDs are spin-coated over silicon dioxide wafer for the fabrication of floating-gate NVM devices. Capacitance-voltage (C-V) and capacitance-time (C-t) measurements of the fabricated NVM device indicate a low voltage operation of device. A sweep voltages as small as 1.2-4 V lead to a flat band voltage shift of 0.35-1.5 V, evidencing the low operating voltage and low power NVM applications. Further, retention characteristics show a robust retention by fabricated NVM device. In addition, C-V measurements are done for the several samples in order to study the process repeatability. The work also is compared with the other processes for the floating gate memory device.
URI: http://dx.doi.org/10.1049/mnl.2019.0148
http://hdl.handle.net/11536/153599
DOI: 10.1049/mnl.2019.0148
期刊: MICRO & NANO LETTERS
Volume: 14
Issue: 12
起始頁: 1274
結束頁: 1277
顯示於類別:期刊論文