完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Guo, Jyh-Chyurn | en_US |
dc.contributor.author | Yeh, Kuo-Liang | en_US |
dc.date.accessioned | 2020-05-05T00:01:56Z | - |
dc.date.available | 2020-05-05T00:01:56Z | - |
dc.date.issued | 2018-01-01 | en_US |
dc.identifier.isbn | 978-2-87487-052-1 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/153997 | - |
dc.description.abstract | A new compact model has been developed in this paper for accurate simulation of RF noise and extraction of actual intrinsic noise in sub-40 nm multi-finger nMOSFETs. This model can predict and verify the excess noise sources before and after deembedding, the mechanism responsible for the complicated layout dependence in various noise parameters, and facilitate optimization design for low noise devices and circuits in nanoscale CMOS technology. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Compact model | en_US |
dc.subject | RF noise | en_US |
dc.subject | layout dependence | en_US |
dc.subject | multi-finger | en_US |
dc.subject | nanoscale | en_US |
dc.subject | CMOS | en_US |
dc.title | A New Compact Model for Accurate Simulation of RF Noise in Sub-40nm Multi-finger nMOSFETs | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2018 13TH EUROPEAN MICROWAVE INTEGRATED CIRCUITS CONFERENCE (EUMIC) | en_US |
dc.citation.spage | 146 | en_US |
dc.citation.epage | 149 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000516752900037 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |