完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWang, C.en_US
dc.contributor.authorLin, Y. C.en_US
dc.contributor.authorKuo, C. N.en_US
dc.contributor.authorLee, M. W.en_US
dc.contributor.authorYao, J. N.en_US
dc.contributor.authorHuang, T. J.en_US
dc.contributor.authorHsu, H. T.en_US
dc.contributor.authorChang, Edward Y.en_US
dc.date.accessioned2020-05-05T00:01:57Z-
dc.date.available2020-05-05T00:01:57Z-
dc.date.issued2019-01-01en_US
dc.identifier.isbn978-2-87487-056-9en_US
dc.identifier.urihttp://hdl.handle.net/11536/154015-
dc.description.abstractAn enhancement-mode tri-gate InAs HEMT is investigated for low noise application in this paper. The 3-D tri-gate structure is sidewall-gate-metal connected to InAlAs layers, the gate connection to the InAlAs layers increases their potential to the positive direction with increasing the gate bias, resulting gate control ability enhancement. Compared with planar device, the tri-gate device shows high transconductance and low noise figure. The enhancement-mode tri-gate device exhibits excellent low noise figure with less than 3.5 dB when the device operation frequency range of 18 GHz to 50 GHz.en_US
dc.language.isoen_USen_US
dc.subjecttri-gateen_US
dc.subjectInAs HEMTen_US
dc.subjectlow noise figureen_US
dc.subjectE-modeen_US
dc.titleStudy of Enhancement-Mode Tri-Gate InAs HEMTs for Low Noise Applicationen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 14TH EUROPEAN MICROWAVE INTEGRATED CIRCUITS CONFERENCE (EUMIC 2019)en_US
dc.citation.spage204en_US
dc.citation.epage207en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.department國際半導體學院zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.contributor.departmentInternational College of Semiconductor Technologyen_US
dc.identifier.wosnumberWOS:000520495200052en_US
dc.citation.woscount0en_US
顯示於類別:會議論文