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dc.contributor.authorHuang, Yu-Anen_US
dc.contributor.authorPeng, Kang-Pinen_US
dc.contributor.authorMeng, Yu-Chiaoen_US
dc.contributor.authorSu, Chun-Jungen_US
dc.contributor.authorLi, Pei-Wenen_US
dc.contributor.authorLin, Horng-Chihen_US
dc.date.accessioned2020-05-05T00:02:22Z-
dc.date.available2020-05-05T00:02:22Z-
dc.date.issued2020-04-01en_US
dc.identifier.issn0021-4922en_US
dc.identifier.urihttp://dx.doi.org/10.7567/1347-4065/ab650aen_US
dc.identifier.urihttp://hdl.handle.net/11536/154179-
dc.description.abstractWe reported an experimental fabrication of double-gated (DG) thin-film transistor (TFT) with IGZO recess-channel using a designer photoresist-based thin-film profile engineering approach. In this approach, an organic shadow mask of photoresist (PR) was formed over a p(+)-Si wafer that was encapsulated by an oxide layer, The lithographically-patterned PR layer is an effective mask for shadowing reactive species during the subsequent deposition steps of IGZO and Aluminum, enabling the formation of IGZO recess-channel and discrete Al source/drain pads at room temperature. The top-gate or DG configurations with the Si substrate serving as the bottom-gate were investigated. The fabricated DG TFTs show significant; improvements in both I-ON and I-OFF as compared with single-gated TFTs. The proposed process scheme is readily applicable to the back-end-of-line of a chip. This work demonstrates the feasibility of IGZO recess-channel TFTs in various gated configurations, enabling a building block for emerging functional devices for More-than-Moore applications. (C) 2020 The Japan Society of Applied Physicsen_US
dc.language.isoen_USen_US
dc.titleA novel photoresist-based film-profile engineering scheme for fabricating double-gated, recess-channel IGZO thin-film transistorsen_US
dc.typeArticleen_US
dc.identifier.doi10.7567/1347-4065/ab650aen_US
dc.identifier.journalJAPANESE JOURNAL OF APPLIED PHYSICSen_US
dc.citation.volume59en_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000519630000102en_US
dc.citation.woscount0en_US
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