完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Huang, Y. -A. | en_US |
dc.contributor.author | Liang, C. -Y. | en_US |
dc.contributor.author | Peng, K. -P. | en_US |
dc.contributor.author | Chen, K. -M. | en_US |
dc.contributor.author | Huang, G. -W. | en_US |
dc.contributor.author | Li, P. -W. | en_US |
dc.contributor.author | Lin, H. -C. | en_US |
dc.date.accessioned | 2020-05-05T00:02:23Z | - |
dc.date.available | 2020-05-05T00:02:23Z | - |
dc.date.issued | 2020-03-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/LED.2020.2970756 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/154184 | - |
dc.description.abstract | A unique approach for fabricating poly-Si thin-film transistors (TFTs) with self-aligned T-shaped gate (T-gate) structure is reported. A counter-doped poly-Si process comprises an in-situ doped n(+) poly-Si deposition followed by a subsequentshallow implantation of BF2+. Both high etching isotropy in n(+) poly-Si and high etching selectivity between n(+) poly-Si and B-doped poly-Si in a Cl-2-based plasma process are the key enablers for the fabrication of our T-gate structures. Thanks to good control in the shape and deformation of our T-gate structure, sidewall air-gap spacers in combination with self-aligned Ni silicided gate and source/drain were established. High-performance sub-micron poly-Si TFTs are evidenced by superior transfer characteristics measured on TFTs with effective gate length of 0.15 mu m . The unique T-gate structure provides an effective way for possible production of poly-Si radio-frequency TFTs viable for emerging new applications. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | T-gate | en_US |
dc.subject | poly-Si | en_US |
dc.subject | TFT | en_US |
dc.subject | selective etching | en_US |
dc.subject | SALICIDE | en_US |
dc.title | A Unique Approach to Generate Self-Aligned T-Gate Transistors in Counter-Doped Poly-Si With High Etching Selectivity and Isotropy | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/LED.2020.2970756 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 41 | en_US |
dc.citation.issue | 3 | en_US |
dc.citation.spage | 397 | en_US |
dc.citation.epage | 400 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000519704300022 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |