完整後設資料紀錄
DC 欄位 | 值 | 語言 |
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dc.contributor.author | Wu, Tian-Li | en_US |
dc.contributor.author | Tang, Shun-Wei | en_US |
dc.contributor.author | Jiang, Hong-Jia | en_US |
dc.date.accessioned | 2020-05-05T00:02:24Z | - |
dc.date.available | 2020-05-05T00:02:24Z | - |
dc.date.issued | 2020-02-01 | en_US |
dc.identifier.uri | http://dx.doi.org/10.3390/mi11020163 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/154201 | - |
dc.description.abstract | In this work, recessed gate AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with double AlGaN barrier designs are fabricated and investigated. Two different recessed depths are designed, leading to a 5 nm and a 3 nm remaining bottom AlGaN barrier under the gate region, and two different Al% (15% and 20%) in the bottom AlGaN barriers are designed. First of all, a double hump trans-conductance (g(m))-gate voltage (V-G) characteristic is observed in a recessed gate AlGaN/GaN MIS-HEMT with a 5 nm remaining bottom Al0.2Ga0.8N barrier under the gate region. Secondly, a physical model is proposed to explain this double channel characteristic by means of a formation of a top channel below the gate dielectric under a positive V-G. Finally, the impacts of Al% content (15% and 20%) in the bottom AlGaN barrier and 5 nm/3 nm remaining bottom AlGaN barriers under the gate region are studied in detail, indicating that lowering Al% content in the bottom can increase the threshold voltage (V-TH) toward an enhancement-mode characteristic. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | GaN | en_US |
dc.subject | metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) | en_US |
dc.subject | recessed gate | en_US |
dc.subject | double barrier | en_US |
dc.title | Investigation of Recessed Gate AlGaN/GaN MIS-HEMTs with Double AlGaN Barrier Designs toward an Enhancement-Mode Characteristic | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.3390/mi11020163 | en_US |
dc.identifier.journal | MICROMACHINES | en_US |
dc.citation.volume | 11 | en_US |
dc.citation.issue | 2 | en_US |
dc.citation.spage | 0 | en_US |
dc.citation.epage | 0 | en_US |
dc.contributor.department | 國際半導體學院 | zh_TW |
dc.contributor.department | International College of Semiconductor Technology | en_US |
dc.identifier.wosnumber | WOS:000520181500052 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 期刊論文 |