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dc.contributor.authorLu, Chien-Yuen_US
dc.contributor.authorChuang, Ching-Teen_US
dc.date.accessioned2014-12-08T15:21:46Z-
dc.date.available2014-12-08T15:21:46Z-
dc.date.issued2010en_US
dc.identifier.isbn978-1-4244-5271-2en_US
dc.identifier.urihttp://hdl.handle.net/11536/15515-
dc.description.abstractThis paper presents an energy efficient bootstrapped CMOS driver to enhance switching speed for driving large RC load for ultra low-voltage CMOS VLSI. The proposed bootstrapped driver eliminates the leakage paths in the conventional bootstrapped driver to achieve more positive and negative boosted voltage levels and to allow the boosted nodes to maintain the boosted levels, thus improving boosting efficiency and enhancing the switching speed. Performance evaluation based on UMC 65nm low power technology (Vtn approximate to Vtp approximate to 0.5v) indicates that the proposed driver provides rising-delay improvement of 24%-56% and falling-delay improvement of 9%-30% at V-dd = 0.3 V for 1 to 10 segments of large distributed RC loading, as compared with the conventional bootstrapped driver consuming the same power. Although designed and optimized for ultra low-voltage operation, the proposed bootstrapped driver is shown to be advantageous at high supply voltage as well.en_US
dc.language.isoen_USen_US
dc.titleEnergy Efficient Bootstrapped CMOS Large RC-Load Driver Circuit for Ultra Low-Voltage VLSIen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2010 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AUTOMATION AND TEST (VLSI-DAT)en_US
dc.citation.spage70en_US
dc.citation.epage73en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000300486600020-
Appears in Collections:Conferences Paper