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dc.contributor.authorWu, Ming-Hungen_US
dc.contributor.authorHong, Ming-Chunen_US
dc.contributor.authorChang, Chih-Chengen_US
dc.contributor.authorSahu, Paritoshen_US
dc.contributor.authorWei, Jeng-Huaen_US
dc.contributor.authorLee, Heng-Yuanen_US
dc.contributor.authorSheu, Shyh-Shyuanen_US
dc.contributor.authorHou, Tuo-Hungen_US
dc.date.accessioned2020-10-05T02:01:30Z-
dc.date.available2020-10-05T02:01:30Z-
dc.date.issued2019-01-01en_US
dc.identifier.isbn978-4-86348-719-2; 978-4-86348-717-8en_US
dc.identifier.urihttp://hdl.handle.net/11536/155280-
dc.description.abstractThis work reports the complete framework from device to architecture for deep learning acceleration in an all-spin artificial neural network (ANN) built by highly manufacturable STT-MRAM technology. The most compact analog integrate-and-fire neuron reported to date is developed based on the back-hopping oscillation in magnetic tunnel junctions. This novel device is unique because it performs numerous essential neural functions simultaneously, including current integration, voltage spike generation, state reset, and 4-bit precision. The device itself is also a stochastic binary synapse, and thus eases the implementation of the compact all-spin ANN with high accuracy for online training.en_US
dc.language.isoen_USen_US
dc.titleExtremely Compact Integrate-and-Fire STT-MRAM Neuron: A Pathway toward All-Spin Artificial Deep Neural Networken_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 SYMPOSIUM ON VLSI TECHNOLOGYen_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000555822600080en_US
dc.citation.woscount2en_US
Appears in Collections:Conferences Paper