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dc.contributor.authorChen, Shang-Chunen_US
dc.contributor.authorWun, Sin-Jhuen_US
dc.contributor.authorHsu, Chih-Hsiangen_US
dc.contributor.authorLin, Chen-Yuen_US
dc.contributor.authorZhang, Jieen_US
dc.contributor.authorKu, Kai-Ningen_US
dc.contributor.authorChang, Po-Chihen_US
dc.contributor.authorWang, Chung-Chihen_US
dc.contributor.authorChen, Wei-Yenen_US
dc.contributor.authorLee, Tai-Hsinen_US
dc.contributor.authorHuang, Chien-Yingen_US
dc.contributor.authorChen, Ting-Huien_US
dc.contributor.authorLee, Ming-Changen_US
dc.contributor.authorLin, Chien-Chungen_US
dc.date.accessioned2020-10-05T02:01:30Z-
dc.date.available2020-10-05T02:01:30Z-
dc.date.issued2019-01-01en_US
dc.identifier.isbn978-1-7281-0905-3en_US
dc.identifier.issn1949-2081en_US
dc.identifier.urihttp://hdl.handle.net/11536/155281-
dc.description.abstractWe successfully establish a silicon photonics device manufacturing and testing platform in 200mm SOI wafer. We integrate modulator and driver chip to show 30Gbis PAM4 capability. A fully-automatic wafer level characterization process is built up for all optical devices in surface coupling method.en_US
dc.language.isoen_USen_US
dc.subjectsilicon photonicsen_US
dc.subjectmodulatoren_US
dc.subjectwafer level measurementen_US
dc.titleCharacterization of Silicon Photonics Modulator Integration and High Efficiency Testing Platformen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 IEEE 16TH INTERNATIONAL CONFERENCE ON GROUP IV PHOTONICS (GFP 2019)en_US
dc.citation.spage0en_US
dc.citation.epage0en_US
dc.contributor.department光電系統研究所zh_TW
dc.contributor.departmentInstitute of Photonic Systemen_US
dc.identifier.wosnumberWOS:000556110200001en_US
dc.citation.woscount0en_US
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