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dc.contributor.authorHo, Yun-Lungen_US
dc.contributor.authorHuang, Yu-Deen_US
dc.contributor.authorWang, Kai-Yenen_US
dc.contributor.authorFang, Wai-Chien_US
dc.date.accessioned2020-10-05T02:02:22Z-
dc.date.available2020-10-05T02:02:22Z-
dc.date.issued2019-01-01en_US
dc.identifier.isbn978-1-5386-1311-5en_US
dc.identifier.issn1557-170Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/155535-
dc.description.abstractIndependent component analysis (ICA) has been wildly used to improve EEC based application such as brain computer interface (BCI). However, some well know ICA algorithm, such as Infomax ICA, suffering from the problem of convergence latency and make it hard to be apply on real-time application. This paper proposes a highly efficient chip implementation of multi-channel EEC real-time system based on online recursive independent component analysis algorithm (ORICA). The core size of the chip is 1.5525-mm(2) using 28nm CMOS technology. The EEC demonstration board will be implemented with the ORICA chip. The operation frequency and power consumption of the chip are 100 MHz and 17.9 mW respectively. The proposed chip was validated with a real-time circuit integrated system and the average correlation coefficient between simulations results and chip processing results is 0.958.en_US
dc.language.isoen_USen_US
dc.subjectBiomedical signal processingen_US
dc.subjectOnline recursive independent component analysis (ORICA)en_US
dc.subjectReal-time systemen_US
dc.subjectBrain-computer interface (BCI)en_US
dc.titleA SOC Design of ORICA-based Highly Effective Real-time Multi-channel EEG Systemen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2019 41ST ANNUAL INTERNATIONAL CONFERENCE OF THE IEEE ENGINEERING IN MEDICINE AND BIOLOGY SOCIETY (EMBC)en_US
dc.citation.spage664en_US
dc.citation.epage667en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000557295301022en_US
dc.citation.woscount0en_US
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