A Polar Modulated CMOS Class-E Amplifier with a Class-F Driver Stage

doi:10.1109/IITA.2009.403

Full metadata record

DC Field	Value	Language
dc.contributor.author	Tsou, Wen-An	en_US
dc.contributor.author	Wuen, Wen-Shen	en_US
dc.contributor.author	Wen, Kuei-Ann	en_US
dc.date.accessioned	2014-12-08T15:22:03Z	-
dc.date.available	2014-12-08T15:22:03Z	-
dc.date.issued	2009	en_US
dc.identifier.isbn	978-0-7695-3859-4	en_US
dc.identifier.uri	http://hdl.handle.net/11536/15642	-
dc.identifier.uri	http://dx.doi.org/10.1109/IITA.2009.403	en_US
dc.description.abstract	This work presents a fully integrated polar modulated CMOS class-E amplifier in a 0.18 mu m CMOS process. The amplifier using the device-stacking topology is implemented with a self-biased control circuit, which allows the stacked device operating as a resistance, for linearizing the AM-AM and AM-PM distortion. The simulation result shows that the AM-PM distortion is reduced from 18 degrees to 3 degrees. The linearized class-E amplifier with the class-F driver stage can provide the maximum power gain of 21 dB, the maximum output power of 17 dBm, and the peak power-added efficiency (PAE) of 30% from the supply voltage of 2 V.	en_US
dc.language.iso	en_US	en_US
dc.title	A Polar Modulated CMOS Class-E Amplifier with a Class-F Driver Stage	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1109/IITA.2009.403	en_US
dc.identifier.journal	2009 THIRD INTERNATIONAL SYMPOSIUM ON INTELLIGENT INFORMATION TECHNOLOGY APPLICATION, VOL 3, PROCEEDINGS	en_US
dc.citation.spage	658	en_US
dc.citation.epage	661	en_US
dc.contributor.department	電子工程學系及電子研究所	zh_TW
dc.contributor.department	Department of Electronics Engineering and Institute of Electronics	en_US
dc.identifier.wosnumber	WOS:000275935000166	-
Appears in Collections:	Conferences Paper

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