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dc.contributor.authorYu, Tsung-Hanen_US
dc.contributor.authorYang, Chia-Hsiangen_US
dc.contributor.authorCabric, Danijelaen_US
dc.contributor.authorMarkovic, Dejanen_US
dc.date.accessioned2014-12-08T15:24:02Z-
dc.date.available2014-12-08T15:24:02Z-
dc.date.issued2012-09-01en_US
dc.identifier.issn0018-9200en_US
dc.identifier.urihttp://hdl.handle.net/11536/16711-
dc.description.abstract"A digital baseband cognitive radio spectrum sensing processor with 200-kHz resolution over 200-MHz bandwidth is integrated in 1.64 mm in 65-nm(2) CMOS. The processor uses adaptive channel-specific threshold and sensing time to achieve detection probability >= 0.9 and false-alarm probability <= 0.1 for -5-dB SNR and adjacent-band interferers of 30-dB INR within a 50-ms sensing time. The chip power and area are minimized by jointly considering algorithm, architecture, and circuit parameters. The chip dissipates 7.4 mW for a 200-MHz sensing bandwidth, which is a 22x reduction in power per sensing bandwidth compared with prior work."en_US
dc.language.isoen_USen_US
dc.subjectCMOS digital integrated circuitsen_US
dc.subjectcognitive radio (CR)en_US
dc.subjectpower and area minimizationen_US
dc.subjectwideband spectrum sensingen_US
dc.titleA 7.4-mW 200-MS/s Wideband Spectrum Sensing Digital Baseband Processor for Cognitive Radiosen_US
dc.typeArticleen_US
dc.identifier.journalIEEE JOURNAL OF SOLID-STATE CIRCUITSen_US
dc.citation.volume47en_US
dc.citation.issue9en_US
dc.citation.epage2235en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000308007900024-
dc.citation.woscount4-
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