完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wang, Chao-Lung | en_US |
dc.contributor.author | Lee, I-Che | en_US |
dc.contributor.author | Wu, Chun-Yu | en_US |
dc.contributor.author | Liao, Chan-Yu | en_US |
dc.contributor.author | Cheng, Yu-Ting | en_US |
dc.contributor.author | Cheng, Huang-Chung | en_US |
dc.date.accessioned | 2014-12-08T15:24:26Z | - |
dc.date.available | 2014-12-08T15:24:26Z | - |
dc.date.issued | 2012-07-01 | en_US |
dc.identifier.issn | 1533-4880 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1166/jnn.2012.6308 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/16949 | - |
dc.description.abstract | High-performance low-temperature polycrystalline silicon (Poly-Si) thin-film transistors (TFTs) have been fabricated with two-dimensional (2-D) location-controlled grain boundaries using excimer laser crystallization (ELC). By locally increased thickness of the amorphous silicon (a-Si) film that was served as the seed crystals with a partial-melting crystallization scheme, the cross-shaped grain boundary structures were produced between the thicker a-Si grids. The Poly-Si TFTs with one parallel and one perpendicular grain boundary along the channel direction could therefore be fabricated to reach excellent field-effect mobility of 530 cm(2)/V-s while the conventional ones exhibited field-effect mobility of 198 cm(2)/V-s. Furthermore, the proposed TFTs achieved not only superior electric properties but also improved uniformity as compared with the conventional ones owing to the artificially controlled locations of grain boundaries. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Excimer Laser Crystallization (ELC) | en_US |
dc.subject | Polycrystalline Silicon | en_US |
dc.subject | Two-Dimensional (2-D) | en_US |
dc.subject | Thin-Film Transistors (TFTs) | en_US |
dc.title | High-Performance Polycrystalline Silicon Thin-Film Transistors with Two-Dimensional Location Control of the Grain Boundary via Excimer Laser Crystallization | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1166/jnn.2012.6308 | en_US |
dc.identifier.journal | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | en_US |
dc.citation.volume | 12 | en_US |
dc.citation.issue | 7 | en_US |
dc.citation.spage | 5505 | en_US |
dc.citation.epage | 5509 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000307604700068 | - |
dc.citation.woscount | 1 | - |
顯示於類別: | 期刊論文 |