完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | TSENG, HC | en_US |
dc.contributor.author | CHANG, CY | en_US |
dc.contributor.author | PAN, FM | en_US |
dc.contributor.author | CHEN, LP | en_US |
dc.date.accessioned | 2014-12-08T15:03:08Z | - |
dc.date.available | 2014-12-08T15:03:08Z | - |
dc.date.issued | 1995-10-01 | en_US |
dc.identifier.issn | 0021-8979 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1063/1.359818 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/1703 | - |
dc.description.abstract | The epitaxial silicon layer selectively grown on the reactive ion etched (RIE) silicon substrate using CF4, CHF3 and Ar etching gases has been studied. Defects and contaminants induced by the RIE process result in a rough epilayer, and degrade the current-voltage (I-V) characteristics. An interfacial carbide layer is present between the epilayer and the RIE treated substrate. Using an efficient and convenient after-etching treatment with a CF4/O-2 low-energy plasma, we obtain a clean Si surface in the patterned oxide windows for selective epitaxial growth, and the electrical characteristics are significantly improved. (C) 1995 American Institute of Physics. | en_US |
dc.language.iso | en_US | en_US |
dc.title | EFFECTS OF DRY-ETCHING DAMAGE REMOVAL ON LOW-TEMPERATURE SILICON SELECTIVE EPITAXIAL-GROWTH | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1063/1.359818 | en_US |
dc.identifier.journal | JOURNAL OF APPLIED PHYSICS | en_US |
dc.citation.volume | 78 | en_US |
dc.citation.issue | 7 | en_US |
dc.citation.spage | 4710 | en_US |
dc.citation.epage | 4714 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
顯示於類別: | 期刊論文 |