The impact of inner pickup on ESD robustness of multi-finger NMOS in nanoscale CMOS technology

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DC 欄位	值	語言
dc.contributor.author	Ker, Ming-Dou	en_US
dc.contributor.author	Hsu, Hsin-Chyh	en_US
dc.date.accessioned	2014-12-08T15:24:49Z	-
dc.date.available	2014-12-08T15:24:49Z	-
dc.date.issued	2006	en_US
dc.identifier.isbn	0-7803-9498-4	en_US
dc.identifier.uri	http://hdl.handle.net/11536/17253	-
dc.description.abstract	The impact of pickup structure on ESD robustness of multi-finger MOSFET devices in the nanoscale CMOS process is investigated in this work with 1.2-V and 2.5-V devices in a 130-nm CMOS process. The multi-finger MOSFET device without the pickup structure inserted into its source region can sustain a much higher ESD level and more compact layout area for I/O cells.	en_US
dc.language.iso	en_US	en_US
dc.subject	electrostatic discharge (ESD)	en_US
dc.subject	multi-finger MOSFET	en_US
dc.subject	layout	en_US
dc.subject	pickup structure	en_US
dc.title	The impact of inner pickup on ESD robustness of multi-finger NMOS in nanoscale CMOS technology	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2006 IEEE International Reliability Physics Symposium Proceedings - 44th Annual	en_US
dc.citation.spage	631	en_US
dc.citation.epage	632	en_US
dc.contributor.department	電機學院	zh_TW
dc.contributor.department	College of Electrical and Computer Engineering	en_US
dc.identifier.wosnumber	WOS:000240855800112	-
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