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dc.contributor.authorYan, Jin-Taien_US
dc.contributor.authorLin, Kuen-Mingen_US
dc.contributor.authorChen, Yen-Hsiangen_US
dc.date.accessioned2014-12-08T15:24:49Z-
dc.date.available2014-12-08T15:24:49Z-
dc.date.issued2006en_US
dc.identifier.isbn978-0-7803-9389-9en_US
dc.identifier.issn0271-4302en_US
dc.identifier.urihttp://hdl.handle.net/11536/17261-
dc.description.abstractIn this paper, given a set of parallel wires between a pair of adjacent PIG lines, according to the definition and computation of the inductive noise and the classification of violation wires, an O(n) optimal approach is proposed to insert shields into these parallel wires for the avoidance of inductive noise, where n is the number of a set of given parallel wires. The experimental results show that our proposed approach can use less CPU time to minimize the number of inserted shields for the avoidance of inductive noise.en_US
dc.language.isoen_USen_US
dc.titleOptimal shielding insertion for inductive noise avoidanceen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGSen_US
dc.citation.spage1800en_US
dc.citation.epage1803en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000245413502057-
顯示於類別:會議論文