完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Cheng, Chao-Chung | en_US |
dc.contributor.author | Ku, Chun-Wei | en_US |
dc.contributor.author | Chang, Tian-Sheuan | en_US |
dc.date.accessioned | 2014-12-08T15:24:51Z | - |
dc.date.available | 2014-12-08T15:24:51Z | - |
dc.date.issued | 2006 | en_US |
dc.identifier.isbn | 978-0-7803-9389-9 | en_US |
dc.identifier.issn | 0271-4302 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/17280 | - |
dc.description.abstract | This paper presents an HDTV size H.264/MPEG-4 AVC intra encoder suitable for DSC and digital video camera applications. The chip reduces the gate count by saving the costly plane mode and enhances the video quality with the improved cost function. With careful scheduling and high performance function unit, the developed chip can easily support 29.46M pixels/s still image encoding and real-time moving picture intra coding of HDTV 720p@30fps video application when clocked at 117.28MHz under 0.18um CMOS process. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A 1280x720 pixels 30Frames/s H.264/MPEG-4 AVC intra encoder | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS | en_US |
dc.citation.spage | 5335 | en_US |
dc.citation.epage | 5338 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000245413505155 | - |
顯示於類別: | 會議論文 |