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dc.contributor.authorChen, Ke-Horngen_US
dc.contributor.authorChien, Chieh-Chingen_US
dc.contributor.authorHo, Hsin-Hsinen_US
dc.contributor.authorHuang, Li-Renen_US
dc.date.accessioned2014-12-08T15:24:55Z-
dc.date.available2014-12-08T15:24:55Z-
dc.date.issued2006en_US
dc.identifier.isbn978-0-7803-9716-3en_US
dc.identifier.issn0275-9306en_US
dc.identifier.urihttp://hdl.handle.net/11536/17302-
dc.description.abstractAn optimum power MOSFET width technique is proposed in this paper for enhancing the efficiency characteristics of switching DC-DC converters. By implementing a one-cycle buck DC-DC converter, we demonstrate that the dynamic power MOSFET width controlling technique has much improvement in power reduction when the load current is light or heavy. The maximum efficiency of the buck converter is about 92% with 3% efficiency improvement for the heavy load condition. Besides, the efficiency can be enormously improved about 16% for light load condition as a result of the power reduction from the large power MOSFET transistors. Meanwhile, we also propose a new error correction loop circuit (ECL) to get a better load regulation than that of the previous designs. Furthermore, as compared to the adaptive gate driver voltage technique, the optimum power MOSFET width can achieve a great improvement on power saving. It is a better power-saving technique than the low-voltage-swing MOSFET gate drive technique for switching DC-DC converters.en_US
dc.language.isoen_USen_US
dc.titleOptimum power-saving method for power MOSFET width of one-cycle control DGDC convertersen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2006 IEEE Power Electronics Specialists Conference, Vols 1-7en_US
dc.citation.spage2365en_US
dc.citation.epage2369en_US
dc.contributor.department電控工程研究所zh_TW
dc.contributor.departmentInstitute of Electrical and Control Engineeringen_US
dc.identifier.wosnumberWOS:000245402504072-
Appears in Collections:Conferences Paper