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dc.contributor.authorTsai, Joseph Tzuo-Shengen_US
dc.contributor.authorChiueh, Hermingen_US
dc.date.accessioned2014-12-08T15:25:03Z-
dc.date.available2014-12-08T15:25:03Z-
dc.date.issued2006en_US
dc.identifier.isbn978-1-4244-0394-3en_US
dc.identifier.urihttp://hdl.handle.net/11536/17419-
dc.identifier.urihttp://dx.doi.org/10.1109/ICECS.2006.379764en_US
dc.description.abstractHigh linear voltage reference circuitry is designed and implemented in TSMC 0.13 mu m and 0.18 mu m CMOS technology. Previous research has proposed the use of MOS transistors operating in the weak inversion region to replace the bipolar devices in conventional PTAT (proportional to absolute temperature) circuits. However, such solutions often have linearity problem in high temperature region due to the current leaking devices in modern deep sub micron and nano-scale CMOS technology. The proposed circuit utilized temperature complementation technique on two voltage references, PTAT and IOAT (independent of absolute temperature) references, to enhance the linearity and produce a more stable IOAT voltage reference. Base on the simulation results, the R-squares of both circuitries are better than 0.999 in a considerable wider temperature range from -55 degrees C to 170 degrees C. Thus, a fully integrated temperature sensor with wider temperature range is designed and easily to integrate to modern system-on-chip designs with minimal efforts.en_US
dc.language.isoen_USen_US
dc.titleHigh linear voltage references for on-chip CMOS temperature sensoren_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1109/ICECS.2006.379764en_US
dc.identifier.journal2006 13TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3en_US
dc.citation.spage216en_US
dc.citation.epage219en_US
dc.contributor.department電信工程研究所zh_TW
dc.contributor.departmentInstitute of Communications Engineeringen_US
dc.identifier.wosnumberWOS:000252489600054-
Appears in Collections:Conferences Paper


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